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[讨论] ADC INL/DNL仿真咋弄

[讨论] ADC INL/DNL仿真咋弄

如题,在网上找到一条:You can apply a slow input ramp (if differential as in your case you apply Vin+ from High level to low level while Vin- the opposite) and run a transient analysis. Also the ADC digital outputs must drive an ideal 10 bit DAC. The time for the ramp must have such a value that all the codes in the output of the DAC appear. I think that for an 10bit ADC it must be equal to 1024*Tclk.In this way you will get in the output of the DAC, the input ramp quantized in steps. It is easy then, by comparing the input ramp to the output steps to calculate the INL and DNL (the procedure is written in many textbooks ).
1.请问用ramp信号输入得到阶梯状输出后具体是如何比较呢?直接和输入相减吗?
2.我在差分ADC后面接了个理想的单端DAC,得到的是一个柱状图,请问怎么得到阶梯状图呢?
2.如果导入MATLAB是什么样的数据格式,是保存为文本再被MATLAB里调用,数据要预处理一下才能被MATLAB识别吗?

输入给缓慢的理想斜坡信号,10bit的ADC仿真1024点,仿真会得到一个斜坡信号,按照DNL和INL定义,处理输出台阶信号,可以得到INL和DNL

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输入给缓慢的理想斜坡信号,10bit的ADC仿真1024点,仿真会得到一个斜坡信号,按照DNL和INL定义,处理输出台 ...
super_star_j 发表于 2018-4-16 16:36


10位adc你给1024点的斜坡信号,那么dnl/inl分辨率只有0.5bit。仿真的时候如果时间允许给到0.1bit吧。楼主可以看看IEEEadc测试的标准。

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