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[求助] failed on clock tree synthesis

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发表于 2017-9-2 04:23:02 | 显示全部楼层 |阅读模式

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doing P&R in ICCbut got the following error messages for prelude, clock tree compile failed
port sd_CKn is a output to the block

Error: Port 'sd_CKn' cannot inherit its location from the pin 'sdram_CKn_iopad/outputbuffer/Z', because the cell 'sdram_CKn_iopad/outputbuffer' is neither a pad-cell nor a macro-cell. Please check the library. (PSYN-117)
Error: Following Ports have no location. (PSYN-007)
Error: Command 'create_placement' had an error while executing. Discontinuing. (PSYN-003


it was a block level P&R, not the whole chip with I/O 's

I had 74 pin/ports at the level, but only sd_CKn pin got the complain
the command place_opt did run though.

please help
发表于 2017-9-2 09:57:45 | 显示全部楼层
我是来水贴的,不好意思哈
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