|
马上注册,结交更多好友,享用更多功能,让你轻松玩转社区。
您需要 登录 才可以下载或查看,没有账号?注册
x
有兴趣的朋友请发简历至tobias.gu@amd.com
邮件标题: 姓名+应聘职位+eetop, 谢谢
Job Title:SMTS DVEngineer(NBIO)
AMD NBIO (North Bridge IO) team delivers industry leading high performance interconnects IP for all AMD products including dGPU, APU, Server and Game consoles. You'll be working with the global team on NBIO subsystem level verification
Responsibility:
* Work with architecture/IP designers to get a full deep insight on the design under test
* Subsystem level test plan development
* Subsystem level test bench develop/setup/maintain, methodology deployment, verification component create/maintain
* Cooperation with Global team(MKDC, hdl) team, Technical lead of the the team
Requirement:
1. Complex IP/asic/SOC Design Verification, direct experience in IP/SOC or Processor (cpu or GPU) or Industry bus standard (PCI-e, HT, USB, DDR, DisplayPort) or multimedia/video is preferred.
2.Good knowledge of Systemverilog and UVM
3.Good knowledge of Verilog/C/C++/System C/SystemVerilog.
4.Verification insights into random techniques.
5.Verification of large scale ASICs.
6.Experience in power verification is an asset.
7.Verification of Virtualization Components is an asset.
8.Strong C and C++ software development and scripting languages (Perl, C Shell, Makefile, …) experience.
9.Solid background with hardware verification methodologies such as coverage-based verification methodology with the use of hardware assertions (PSL or SVA). |
|