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数字IC设计经理-成都 上海 深圳 珠海
1)只是在原设计基础上做稍微修改的技术管理者不要
2)需要能够从零基础做起的,深知全数字流程的,并且敢接各种新兴数字项目的人,散打型的人。
3)内部技术有候选人在做,但是资历尚浅,该职位需要储备
岗位职责:
1、负责芯片的数字部分模块级设计和验证;
2、负责RTL编程/仿真及FPGA验证/Debug;
3、参与芯片的后端仿真及后续支持
任职要求:
1、电子、微电子及相关专业,英语口语熟练,读写无障碍;
2、精通数字集成电路设计编解码语言verilog/Vhdl;
3、熟悉数字前端IC设计流程,熟练使用Cadence/Synopsys等相关EDA设计工具;
4、具有8年以上集成电路设计工作经验,有蓝牙或数模混合芯片开发者优先;
5、需具有强烈的责任心和自发主动性;
6、善于工作总结,有较好的团队合作能力,勇于承担挑战性工作;
7、具有tapeout流片经验者优先。
4,资深数字IC设计-上海 成都 珠海 深圳
1)关键词:基本总线接口比如I2C,SPI以及UART,在仿真和验证方面,设计Testbench的能力,Debug方面的能力以及FPGA验证方面的能力,还有后仿真以及时序检查
2)简历中在描述各种能力时切忌笼统,最好笔墨多点,寥寥两三行是不行的,同时换工作的原因比较重要,要能自圆其说且符合常理,过于自我的跟老板理念不合的不要。
3)只定位于高级工程师。
Summary Job Description:
(1) Digital design, simulation and verification.
(2) Chip debug, evaluation and test supports.
Principal Duties and Responsibilities:
(1) Working on digital IC design/verification;
(2) Responsible for RTL design & simulation, pre-/post-layout simulation, FPGA verification, logic synthesis, static timing analysis, test pattern generation for ATE;
(3) Cooperating with Analog group, interfacing to supporting groups such as software, layout, test, and product
Knowledge, Skills, and Abilities Required:
(1) BS Degree or above in EE or equivalent;
(2) 3+ years working experience in asic design;
(3) Familiar with ASIC design flow and IC design tools such as VCS, Verilog-XL, ModelSim, Design Compiler, Prime Time etc.;
(4) Must be proficient in Verilog/VHDL, and digital low power design
(5) DFT technique and synthesis, test vector generation and fault coverage simulation
(6) Experience on FPGA verification;
(7) Knowledge of communication interfaces such as I2C, SMBUS, SPI, LIN bus, CAN bus is a plus;
(8) Familiarity of 8/16 bit microcontroller design is preferred;
(9) Experience of mixed-signal design is preferred;
(10) Good oral and written English communication skills;
(11) Creative, self-motivated, responsible, good team work spirit
我的QQ:473421885
电话:0755-66606920
有意者简历可发:carry.wang@yaxunhr.com |
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