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I have my RTL coded like this:`define BYTE_BURT7 3'b111
reg [2:0] byteselect;
reg select[9:0]
parallel_mon defined as outputs:
output [7:0] parallel_mon,
if (select[9] & (byteselect == 'BYTE_BURT7 )) assign parallel_mon = reg_data[693:686];
ncverilog run gave me
if (select[9] & (byteselect == 'BYTE_BURT7 )) assign parallel_mon = reg_data[693:686];
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ncvlog: *E,NULLNU (shiftreg4chipB.v,562|34): based number lacks value [2.5(IEEE)].
if (select[9] & (byteselect == 'BYTE_BURT7 )) assign parallel_mon = reg_data[693:686];
how do I start to fix, please help |
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