在线咨询
eetop公众号 创芯大讲堂 创芯人才网
切换到宽版

EETOP 创芯网论坛 (原名:电子顶级开发网)

手机号码,快捷登录

手机号码,快捷登录

找回密码

  登录   注册  

快捷导航
搜帖子
芯片精品文章合集(500篇!)    创芯人才网--重磅上线啦!
查看: 5031|回复: 23

[招聘] 芯原微电子-成都 招聘DV/ASIC Design/Project Leader

[复制链接]
发表于 2016-10-31 13:40:56 | 显示全部楼层 |阅读模式

马上注册,结交更多好友,享用更多功能,让你轻松玩转社区。

您需要 登录 才可以下载或查看,没有账号?注册

x
本帖最后由 sunny555 于 2016-11-1 17:19 编辑

芯原股份有限公司(芯原)是一家芯片设计平台即服务(Silicon Platform as a Service,SiPaaSTM)提供商,为包含移动互联设备、数据中心、物联网IOT)、可穿戴设备、智能家居和汽车电子等多种终端市场在内的各种广泛应用提供以IP为中心的、基于平台的芯片定制服务和一站式端到端的半导体设计服务。   
芯原成立于2001年,总部位于中国上海,目前在全球已有超过600名员工。芯原在中国、美国和芬兰共设有6个设计研发中心,并在全球共设有9个销售和客户支持办事处。   
如需了解更多信息,欢迎关注公司官网:http://www.verisilicon.com/

芯原微电子(成都)有限公司诚邀您的加入!!!   
公司地址:天府软件园C区10栋23楼;   
简历投递邮箱:yujuan.li@verisilicon.com

职位信息如下:

Senior Design Verification Engineer

Responsibility :
o    Plan the verification of complex digital design blocks by fully understanding the design specification and interacting with design teams to identify important verification scenarios
o    Create constrained-random verification environment using python, verilog (or system verilog)
o    Develop functional/performance test cases
o    Identify and write all types of coverage measures for stimulus and corner-cases
o    Debug tests to deliver functional correct blocks  
o    Disciplined issue reporting, bug tracking and communication of design risks & status

Basic Qualifications :
o    MS degree in Electrical Engineering or equivalent practical experience
o    Experience in the verification of designs such as GPUs, cpus, networking or peripheral controllers
o    Experienced with the full verification cycle
o    Strong knowledge of system Verilog and C++
o    Experience with scripting language(Python, Perl preferred)
o    Strong communicator and team player
o    Strong problem solver

Preferred Qualifications :  
o    At least 2 years of design experience on complicated blocks
o    Experience with profiling, performance or power simulation
o    Familiar with FPGA flow and comfortable with lab debugging


Senior ASIC Design Engineer

Design top-of-the-line graphics processors, including specification, architecture, micro-architecture, implementation (using Verilog), and verification.

Expected skills:
o    3+ years hands-on experience.
o    Programming skills in Verilog hdl.
o    Must be familiar with all stages of the ASIC design flow (including specification, architecture, and design implementation).
o    Highly motivated and skillful at solving difficult technical problems.
o    Knowledge of computer graphics and low-power design techniques a plus.
o    Experience of GPU or compression design a plus.

Project Leader of ASIC Design

Design top-of-the-line graphics processors, including specification, architecture, micro-architecture, implementation (using Verilog), and verification.


Expected skills:
o    5+ years hands-on experience.
o    Experience of leading a project from spec define to final release.
o    Programming skills in Verilog HDL.
o    Must be familiar with all stages of the ASIC design flow (including specification, architecture, and design implementation).
o    Highly motivated and skillful at solving difficult technical problems.
o    Knowledge of computer graphics and low-power design techniques a plus.
o    Experience of GPU or compression design a plus.


欢迎大家投递或推荐,谢谢!

                               
登录/注册后可看大图

                               
登录/注册后可看大图
发表于 2018-4-15 14:09:38 | 显示全部楼层
现在去外企,悬,特别是欧美外企,说不定哪天就给你N+1了。。。。
发表于 2018-4-13 14:02:01 | 显示全部楼层
芯原想要最低的价格找到最牛逼的大神,一个职位找N年也是很正常的啦
那点薪水,在成都也不算是有竞争里吧,顶多中游水平
发表于 2018-4-13 07:29:29 | 显示全部楼层
It's very interesting! Thanks!
 楼主| 发表于 2017-3-1 15:33:29 | 显示全部楼层
updat
 楼主| 发表于 2017-2-16 09:51:25 | 显示全部楼层
update
 楼主| 发表于 2017-1-17 10:39:24 | 显示全部楼层
 楼主| 发表于 2017-1-9 13:52:08 | 显示全部楼层
update
 楼主| 发表于 2017-1-4 10:03:19 | 显示全部楼层
回复 15# 396222668


   你好,本科2年,年资有点少哦,暂时需要更资深的,谢谢你对我司的关注
 楼主| 发表于 2017-1-4 10:01:28 | 显示全部楼层
update
您需要登录后才可以回帖 登录 | 注册

本版积分规则

关闭

站长推荐 上一条 /1 下一条

关闭

小黑屋| 关于我们| 联系我们| 在线咨询| 隐私声明| EETOP 创芯网
( 京ICP备:10050787号 京公网安备:11010502037710 )

GMT+8, 2024-3-28 23:18 , Processed in 0.032680 second(s), 8 queries , Gzip On, Redis On.

eetop公众号 创芯大讲堂 创芯人才网
快速回复 返回顶部 返回列表