Cadence Principal Application Engineer –数字后端热招中

kengteng

Cadence PrincipalApplication Engineer –数字后端热招中

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Title:    Principal Application Engineer (PhysicalDesign)

Location: Shanghai

Position Description:

To providekey technical support in digital IC design implementation, productdemonstration, and sales presentations.

Todemonstrate strong ability and to be hands-on in RTL-to-GDSII design methodology,for challenging low power designs, for 200MHz to several GHz big chips.

Have realdesign experience including conformal check, logic synthesys, P&R, CTS,SSTA, MMMC to close timing, power and die area.

Assist intechnical evaluation, assessment and delivery of concurrent asic/SoC designs.

To play aleading role among other team members, while receive little instruction onroutine and general assignments.

Position Requirements:         

A bachelor'sdegree is essential and 7+ years’ experience in IC design, electronicengineering or computer science applications.

Ability tounderstand and articulate technical issues, (and knowledge of) design productsand their applications.

Requiresworking knowledge of one or more programming languages, and effectivecommunication and soft skills.

An MS degreeand/or working experience in multi-nation IC design house is a plus.

Title:   Principal Application Engineer (Front-end Verification)

Location: Shanghai

Position Description:

- Workclosely with the Sales team to identify and scope opportunities for CadenceEmulation and Acceleration products.

- Plan,execute and manage key technical evaluations and benchmark with existing andpotential customers.

- Train,ramp-up and accompany customer project.

- Conduct basicand advanced trainings, presentations and demos as necessary.

- Providingtechnical expertise to address clients’ queries, which need expert involvement.

- Alignedclosely with corporate engineering and sales/marketing team on customerrequirement for product direction/improvement.

Position Requirements:         

- 4~6 years’experience in the following areas:

- HWverification with knowledge of System verilog/Vhdl and HDL simulators

- FPGAprototyping project experience is a must

- Experiencewith hardware emulator or accelerator is a big advantage

-  Advanced Verification Methodology like UVM isa plus

- Knowledgeof Unix and Linux is highly desired

- Strongverbal and written communication skills in English

- Strongteamwork skills with good human relationship

Title:   Principal Application Engineer (Analog Design)

Location: Shanghai

Position Description:

-Providetechnical support for Cadence Custom IC front to back design flow. Mainly focuson analog/RF/mixed-signal circuit simulation products support.

-Hasthorough understanding of Cadence virtuoso solution marketplace and objectives,including key players, products and trends.

-Supportsale to address customers' technical demand to propose and deliver valueposition for maximizing business opportunities.

-ConductCadence Virtuoso products demonstration, presentation, workshop and benchmarkto address the customer's technical concerns.

-Providepost-sales support such as products training, software environment maintain,products usage guide to assure customer satisfaction and nurture future salespotentials.

-Ability toopenly exchange and communicate technical information with peers, groupmanagement, and customers.

Position Requirements:         

-Bachelor'sdegree majoring in electronic engineering or computer science applications,with 5+ years experience in Analog and RF IC design.

-Materdegree and/or working experience in multi-nation IC design house is preferred.

-Strongverbal and written skills in English are required.

-Have goodcommunication skill and teamwork spirit.

Title:   Principal/Lead Application Engineer- Tensilica IP

Location: Shanghai

Position Description:

1. As the member of the APAC Tensilica IP Field ApplicationsEngineering (FAE) Team, you will participate in driving technical and businesscampaign success with industry leading semiconductor and system companies.

2. Understand Cadence’s end customer’s IP needs and providefront line technical support in Pre-Sales and Post-Sales process.

3. Champion the customer needs and work with Sales Team,R&D and Product Marketing to develop competitive and creative technicalsolutions to win campaigns

4. Be a key contributor driving product roadmap directionfor our next generation products

Position Requirements:

1. BS degree in Electrical Engineering/Computer Science orrelated field

2. At least 5+ years of SoC and/or embedded software or dspalgorithm design experience

3. Have strong customer facing skills to be able toestablish technical & management credibility with the key technicaldecision makers

4. Have experience and/or knowledge of one or more ofDigital Audio, DSP, imaging or computer vision technologies

5. Previous experience with DSP processor core (TensilicaXtensa is preferred) or derivatives is highly desirable

6. Experience with DSP & cpu architectures desirable –including architectural, software or HW/Debug related

7. Experience of embedded software process for DSPdevelopment is beneficial, particularly for embedded DSP core architectures

Title:   Principal/Lead Application Engineer- layout

Location: Shanghai

Position Description:

1.Provide technical support for Cadence Custom IC front toback design flow. Mainly focus on analog circuit layout design and physicalverification

2.Has thorough understanding of Cadence Virtuoso solutionmarketplace and objectives, including key players, products and trends.

3.Work with customers and sales to define, implement andsupport advanced custom layout design in technical engagements.

4.Support sale to address customers' technical demand topropose and deliver value position for maximizing business opportunities.

5.Conduct Cadence Virtuoso products demonstration,presentation, workshop and benchmark to address the customer's technicalconcerns.

6.Provide post-sales support such as products training,software environment maintain, products usage guide to assure customersatisfaction and nurture future sales potentials.

7.Ability to openly exchange and communicate technicalinformation with peers, group management, and customers.

Position Requirements:

1.Education: BSEE required, MSEE preferred.

2.Has over 7 year’s design experience in Analog IC layoutdesign and physical verification, prefer to be familiar with Virtuoso layoutsuite, PVS, QRC and Skill programming.

3.Be proficient in the customer support process.

4.Strong verbal and written skills in English are required.

5.Have good communication skill and teamwork spirit.