Placement and Sizing Method for Capacitors in a Charge-Scaling DAC

pickpunk · 发表于 2016-8-24 13:35:51

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A New Chessboard Placement and Sizing Method for Capacitors in a Charge-Scaling DAC by Worst-Case Analysis of Nonlinearity

New methods for the placement and sizing of capacitor arrays with increased ratio accuracy and improved converter linearity are presented in this paper. A new model of statistical variation is used, which takes into account both spatial correlation between devices and device area. This is combined with a novel analytical model for the linearity metrics of a charge scaling digital-to-Analog converter.

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