UVM Connect库实现SC与SC间通信的编译问题

Rinoa

官方提供的UVM Connect库实现了UVM中Systemverilog与SystemC多语言通信问题。库分为SC的.h .cpp 以及 SV的.sv文件两部分，
在对库的SC部分sccom -link时出错，提示无法找到`UVMC_report'`UVMC_raise_objection'等函数（见log），
发现原因是uvmc_commands.cpp调用了多个函数，
这些函数不是在SC，而是在SV中实现的。
即，对SC文件link时，无法找到SV中定义的函数。自己分析认为，可能是需要编译创建一个.h或者.dll，在link时让compiler认知到需要的函数，但不知道具体的做法
求各位大神帮忙

给出UVMC源码：http://bbs.eetop.cn/viewthread.php?tid=476062环境工具：UVMC的版本为2.1.4，工具为win32下Modelsim 10.1a以及Questasim 10.2c，分别使用两种工具，报错内容相同。

Makefile（部分）：
        vlog.exe -work uvm_c -incr +incdir+ "E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvm-1.1a/src" +incdir+ "E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master/src/connect/sv" -L "E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvm-1.1a" "E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master/src/connect/sv/uvmc_pkg.sv"
        sccom.exe -work uvm_c -incr -g -I "E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master/src/connect/sc" "E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master/src/connect/sc/uvmc.cpp"
        sccom.exe -work uvm_c -g -I "E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master/src/connect/sc" -lib uvm_c -DSC_INCLUDE_DYNAMIC_PROCESSES -link


Log：
sccom -link -lib uvm_c
#
# Model Technology ModelSim SE sccom 10.1a compiler 2012.02 Feb 22 2012
#
# work\_sc\win32_gcc-4.2.1\sv2sc.o: In function `sc_main':
# D:\zyz_uvmc_test/sv2sc.cpp:51: multiple definition of `sc_main'
# work\_sc\win32_gcc-4.2.1\sc2sv.o:\zyz_uvmc_test/sc2sv.cpp:125: first defined here
# work\_sc\win32_gcc-4.2.1\sc2sv.o:sc2sv.cpp.text$_ZN4uvmc23uvmc_tlm2_channel_proxyIN3tlm19tlm_generic_payloadENS1_9tlm_phaseE14uvmc_converterIS2_EE5writeERKS2_[uvmc::uvmc_tlm2_channel_proxy<tlm::tlm_generic_payload, tlm::tlm_phase, uvmc_converter<tlm::tlm_generic_payload> >::write(tlm::tlm_generic_payload const&)]+0xed): undefined reference to `C2SV_write'
# work\_sc\win32_gcc-4.2.1\sc2sv.o:sc2sv.cpp.text$_ZN4uvmc23uvmc_tlm2_channel_proxyIN3tlm19tlm_generic_payloadENS1_9tlm_phaseE14uvmc_converterIS2_EE15nb_transport_fwERS2_RS3_RN7sc_core7sc_timeE[uvmc::uvmc_tlm2_channel_proxy<tlm::tlm_generic_payload, tlm::tlm_phase, uvmc_converter<tlm::tlm_generic_payload> >::nb_transport_fw(tlm::tlm_generic_payload&, tlm::tlm_phase&, sc_core::sc_time&)]+0x118): undefined reference to `C2SV_nb_transport_fw'
# work\_sc\win32_gcc-4.2.1\sc2sv.o:sc2sv.cpp.text$_ZN4uvmc23uvmc_tlm2_channel_proxyIN3tlm19tlm_generic_payloadENS1_9tlm_phaseE14uvmc_converterIS2_EE11b_transportERS2_RN7sc_core7sc_timeE[uvmc::uvmc_tlm2_channel_proxy<tlm::tlm_generic_payload, tlm::tlm_phase, uvmc_converter<tlm::tlm_generic_payload> >::b_transport(tlm::tlm_generic_payload&, sc_core::sc_time&)]+0xb7): undefined reference to `C2SV_b_transport'
# work\_sc\win32_gcc-4.2.1\sv2sc.o:sv2sc.cpp:(.text$_ZN4uvmc21uvmc_initiator_socketILj32EN3tlm23tlm_base_protocol_typesELi1ELN7sc_core14sc_port_policyE0E14uvmc_converterINS1_19tlm_generic_payloadEEE15nb_transport_bwERS6_RNS1_9tlm_phaseERNS3_7sc_timeE[uvmc::uvmc_initiator_socket<32u, tlm::tlm_base_protocol_types, 1, (sc_core::sc_port_policy)0, uvmc_converter<tlm::tlm_generic_payload> >::nb_transport_bw(tlm::tlm_generic_payload&, tlm::tlm_phase&, sc_core::sc_time&)]+0x9e): undefined reference to `C2SV_nb_transport_bw'
# work\_sc\win32_gcc-4.2.1\sv2sc.o:sv2sc.cpp:(.text$_ZN4uvmc20uvmc_tlm2_port_proxyIN3tlm19tlm_generic_payloadENS1_9tlm_phaseE14uvmc_converterIS2_EE21blocking_sync_processEv[uvmc::uvmc_tlm2_port_proxy<tlm::tlm_generic_payload, tlm::tlm_phase, uvmc_converter<tlm::tlm_generic_payload> >::blocking_sync_process()]+0xe6): undefined reference to `C2SV_blocking_rsp_done'
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master\_sc\win32_gcc-4.2.1\uvmc.o: In function `uvmc_get_config_string':
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master/src/connect/sc/uvmc_commands.cpp:313: undefined reference to `UVMC_get_config_string'
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master\_sc\win32_gcc-4.2.1\uvmc.o: In function `uvmc_get_config_int':
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master/src/connect/sc/uvmc_commands.cpp:301: undefined reference to `UVMC_get_config_int'
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master\_sc\win32_gcc-4.2.1\uvmc.o: In function `uvmc_set_config_string':
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master/src/connect/sc/uvmc_commands.cpp:291: undefined reference to `UVMC_set_config_string'
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master\_sc\win32_gcc-4.2.1\uvmc.o: In function `uvmc_set_config_int':
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master/src/connect/sc/uvmc_commands.cpp:281: undefined reference to `UVMC_set_config_int'
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master\_sc\win32_gcc-4.2.1\uvmc.o: In function `uvmc_find_factory_override':
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master/src/connect/sc/uvmc_commands.cpp:263: undefined reference to `UVMC_find_factory_override'
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master\_sc\win32_gcc-4.2.1\uvmc.o: In function `uvmc_debug_factory_create':
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master/src/connect/sc/uvmc_commands.cpp:255: undefined reference to `UVMC_debug_factory_create'
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master\_sc\win32_gcc-4.2.1\uvmc.o: In function `uvmc_set_factory_type_override':
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master/src/connect/sc/uvmc_commands.cpp:248: undefined reference to `UVMC_set_factory_type_override'
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master\_sc\win32_gcc-4.2.1\uvmc.o: In function `uvmc_set_factory_inst_override':
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master/src/connect/sc/uvmc_commands.cpp:240: undefined reference to `UVMC_set_factory_inst_override'
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master\_sc\win32_gcc-4.2.1\uvmc.o: In function `uvmc_print_factory':
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master/src/connect/sc/uvmc_commands.cpp:232: undefined reference to `UVMC_print_factory'
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master\_sc\win32_gcc-4.2.1\uvmc.o: In function `uvmc_report_fatal':
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master/src/connect/sc/uvmc_commands.cpp:186: undefined reference to `UVMC_report'
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master\_sc\win32_gcc-4.2.1\uvmc.o: In function `uvmc_report_error':
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master/src/connect/sc/uvmc_commands.cpp:175: undefined reference to `UVMC_report'
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master\_sc\win32_gcc-4.2.1\uvmc.o: In function `uvmc_report_warning':
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master/src/connect/sc/uvmc_commands.cpp:164: undefined reference to `UVMC_report'
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master\_sc\win32_gcc-4.2.1\uvmc.o: In function `uvmc_report_info':
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master/src/connect/sc/uvmc_commands.cpp:153: undefined reference to `UVMC_report'
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master\_sc\win32_gcc-4.2.1\uvmc.o: In function `uvmc_report':
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master/src/connect/sc/uvmc_commands.cpp:141: undefined reference to `UVMC_report'
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master\_sc\win32_gcc-4.2.1\uvmc.o: In function `uvmc_set_report_verbosity':
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master/src/connect/sc/uvmc_commands.cpp:129: undefined reference to `UVMC_set_report_verbosity'
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master\_sc\win32_gcc-4.2.1\uvmc.o: In function `uvmc_report_enabled':
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master/src/connect/sc/uvmc_commands.cpp:120: undefined reference to `UVMC_report_enabled'
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master\_sc\win32_gcc-4.2.1\uvmc.o: In function `uvmc_drop_objection':
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master/src/connect/sc/uvmc_commands.cpp:109: undefined reference to `UVMC_drop_objection'
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master\_sc\win32_gcc-4.2.1\uvmc.o: In function `uvmc_raise_objection':
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master/src/connect/sc/uvmc_commands.cpp:100: undefined reference to `UVMC_raise_objection'
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master\_sc\win32_gcc-4.2.1\uvmc.o: In function `uvmc_print_topology':
# E:/Program Files (x86)/modeltech_10.1a/verilog_src/uvmc-master/src/connect/sc/uvmc_commands.cpp:62: undefined reference to `UVMC_print_topology'
# collect2: ld returned 1 exit status
# ** Error: (sccom-6145) Symbol collisions from multiple object files are resulting in linker errors. The following could reasons could cause this error:
#
# o Out-of-line functions defined in your header files.
#
# o No include guards used in the header files.
#
# o Stale object files in the work directory.
#
# o Multiple symbols defined with the same name across different source files.
#
# Look at the linker error messages for clues about the names of the problematic symbols.
#
#
# ** Error: (sccom-6126) Linking failed. Creation of work/systemc.so failed.
#
#
# E:/Program Files (x86)/modeltech_10.1a/win32/sccom failed.

sjlu

有答案了吗？我也遇到同样问题。我的环境是centos vcs