重磅推出：verdi+vcs+ncverilog+verilog-xl+dc 资料(持续更新)

QQben · 发表于 2017-5-18 13:47:43

享享福

xiaoyisimonguo · 发表于 2017-5-18 14:27:41

回复 1# redleaf1988

do we have cracked NCVerilog?

jimcmwang · 发表于 2017-5-25 22:46:45

verdi_verdilab.part1.rar (3.34 MB)
verdi_verdilab.part2.rar (3.34 MB)
verdi_verdilab.part3.rar (2.84 MB)
veridi_tutorial.part1.rar (3.34 MB)
veridi_tutorial.part2.rar (3.34 MB)
veridi_tutorial.part3.rar (3.34 MB)
veridi_tutorial.part5.rar (3.34 MB)
veridi_tutorial.part4.rar (3.34 MB)
veridi_tutorial.part6.rar (1.91 MB)
VCS training.rar (1.33 MB)
Advanced_Verilog_2[1].6_SLG.pdf (2.04 MB)
Basic_Verilog_w_VCS_V6[1].5_SLG.pdf (2.81 MB)
vcs_quickstart.pdf (1.25 MB)
仿真指南(第二版).pdf (226.71 KB)
验证与VCS使用.pdf (779.19 KB)
Cadence NC-Verilog Simulator Help v8.2_Nov 2008.rar (3.75 MB)
ncvlog.pdf (1.41 MB)
ncvlogtut.pdf (285.68 KB)
Verilog-XL 的介绍.pdf (1.22 MB)
Chip Synthesis Workshop Lab.pdf (1.9 MB)
DClab_2007.03.rar (3.23 MB)
RISC_DC.rar (496.58 KB)
Synopsys Design Compiler 2008.07 Lab 操作說明檔.pdf (2.93 MB)
Synopsys_DC_workshop.rar (4.48 MB)