关于Analog/Mixed-Signal Verification, Behavior Modeling的讨论

WLH_EE_TOP

楼主，看了您的帖子，大大的赞赞赞！！！
不过，没有看见参考文献[6]，能不能贴出名字，非常有兴趣！谢谢

敏兹

当年做折叠内插adc时，想写个折叠放大器的verilog-a模型，结果写了半天都写不出来，真郁闷，后来只能拿三角函数去近似，无语

zhjwei

多谢分享，还需要好好学习

tiantianxch

好多文档啊

买履人

回复 10# JoyShockley


   您好，我也要做ADPLL建模，能否指点下，谢谢。方便的话可以联系我，我QQ878357778，谢谢您。

dacongtou27

学习了 mark一下

Ryggeor

thnx!

飞扬紫百合

这个“Analog/Mixed-Signal Verification, Behavior Modeling”是书名么？

dandeng

you mentioned Verilog-AMS , there is wreal datatype, which will call digital simulator, but why you find out there is so big difference of simulation speed between Verilog and Verilog-AMS.

zixin1hao

回复 29# dandeng


   Simulation speed does not just depend on the language, but as well as the implementation of behavior model. If only event driven behavior models are included in mixed-signal simulation, no conservative statement, model with verilog-ams could be very fast, be comparable to verilog. For example, if you just use wreal in verilog-ams to describe analog behavior, then no analog simulation engine is invoke, it is almost the same as pure digital simulation.