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[招聘] NVIDIA上海急招IC验证及设计工程师

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发表于 2014-4-14 14:33:44 | 显示全部楼层 |阅读模式

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亲们,
NVIDIA上海急招asic Design/Verification Engineer, 有兴趣的童鞋可以将简历发至:sasu@nvidia.com 或者加QQ了解详细:524786472
以下是职位描述:

Position Title: ASIC Design Engineer


Job Description/Qualifications:

The ASIC design engineer is expected to co-work witharchitect to define architecture/micro-architecture, do RTL implementation andfunction verif.


Minimum Requirement:

- BS/MS in electrical/computer engineering and related.

- Strong design/implementation skills in verilog.

- Solid understanding in feature arch and SW programmingmodel.

- Good timing/power optimization skills of digital designand can drive verification on both IP and fullchip.

- Perl scripting skills is appreciated as a plus.

- Image process knowledge like scaling, displayPort/HDMI etcis a big plus.

- Fluent English (both written and spoken) and excellentcommunication skills

- Demonstrated ability to work independently as well as in amulti-disciplinary group environment

________________________________________________________________________________________________

Position Title: Senior ASIC Verification Engineer(Power)


Job Description/Qualifications:

Responsibilities:

-Developing/Mantaining verification environment,including testbench, regression system -Developing test plans for and verifyingthe function of ASIC power/clock control IP -Responsible for verifcationcomleteness, including coverage, drive bug to close, metrics for verificationquality -Monitoring and review test code

Requirement:

-At least 5+ years of ASIC verification experience(MS,EE) or equavelent BS EE, CE, CS.

-The successful candidate should have experience goingthrough at least one complete and successful ASIC design/verification cyclefrom architecting and creating ASIC test environment to full completion of theverification work.

-Strong programming skills in perl makefile,Verilog/Verilog-PLI//C/C++ -Working Experience with UVM/OVM/VMM (at least oneof them) -A strong communication skill in both Chinese and English is required.

-Knowledge of power management design/verification is aplus


BestRegards,

Sarah Su

APACStaffing Team

NVIDIASHANGHAI

Tel +(8621) 61041139

MP +(86)15900770601
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