[springer]低功耗设计Low-Power Design Techniques and CAD Tools for Analog ......

xinhunlei

[低功耗设计]  Low-Power Design Techniques and CAD Tools for Analog and RF Integrated Circuits

springer 2003年的书,在springer的网站上下载的电子版,奉献给大家


Contents
List of Figures
List of Tables
Contributing Authors
Foreword
Introduction
1
Motivation, context and objectives
Georges Gielen, Piet Wambacq, John F.M. Gerrits
2
Analysis and simulation of RF subsystems
Jaijeet Roychowdhury
2.1 Steady-state analysis
2.1.1
2.1.2
Harmonic Balance and Shooting
Fast Methods
2.2 Multitime analysis
2.2.1
2.2.2
Autonomous Systems: the Warped MPDE
Macromodelling time-varying systems
2.3 Noise in RF design
2.3.1
2.3.2
Mixing noise
Phase Noise
2.4 Conclusions
References
3
FAST: an efficient high-level dataflow simulator of mixed-signal frontends
of digital telecom transceivers
Gerd Vandersteen, Piet Wambacq, Stéphane Donnay, Wolfgang Eberle Yves Rolain
3.1
3.2
3.3
High-level models of front-end blocks
Multirate multicarrier (MRMC) representation of signals
Computation of the response to an MRMC signal
3.3.1
3.3.2
Combinatorial approach
Fourier transform approach
3.4
3.5
3.6
3.7
Construction of a computational graph
Scheduling and execution
Coupling of FAST with the digital simulation environment OCAPI
Runtime examples
3.7.1
3.7.2
Influence of the buffer size on the cpu time
Processing of nonlinear blocks
3.8 Conclusions
References
4
Efficient high-level simulation of analog telecom frontends
Piet Vanassche, Georges Gielen, Willy Sansen
4.1 Situating the exponential approach within a global framework for
simulation algorithms
4.1.1
4.1.2
4.1.3
Basic ideas behind simulation
An overview of some existing simulation algorithms
The complex damped exponential approach
4.2 The complex damped exponential basis and its signal modeling capabilities
4.3 A simulation approach using complex damped exponentials
4.3.1
4.3.2
4.3.3
4.3.4
Elementary arithmetics using exponentials
Algorithms for dealing with linear systems
Algorithms for dealing with weakly nonlinear systems
Conversion between sampled data and exponential representation
4.4
4.5
Experimental results
Conclusions
References
5
High-level power estimation of analog front-end blocks
Erik Lauwers, Georges Gielen
5.1 System design of telecom front ends
5.1.1
5.1.2
5.1.3
Localising the digital and the analog part
Refining the analog part
Conclusions from current system design and possible improvements
5.2 Analog power estimators
5.2.1
5.2.2
High-level power estimation
Construction of power estimators
5.2.2.1 First approach: bottom-up
5.2.2.2
5.2.2.3
5.2.2.4
Second approach: top-down
Illustration of both approaches
Conclusions
5.3 Examples of fundamental relations used to estimate the power consumption
5.3.1
5.3.2
5.3.3
Analog integrated continuous-time filtering
Analog signal processing: mixers
Conclusions on fundamental estimators
Practical high-level power estimators
5.4.1
5.4.2
5.4.3
A power estimation model for high-speed CMOS ADCs
Power estimation using neural networks
High-level power estimation of analog continuous-time filters
5.4.4 Conclusion about practical estimators
5.4
5.5 Summary
References
6
Models and Analysis Techniques for Systematic Design and Verification
of Frequency Synthesizers
Bart De Smedt, Georges Gielen
6.1 Aspects of modeling
6.1.1
6.1.2
Why modeling ?
Modeling requirements
6.2 Introduction to frequency synthesizers
6.2.1
6.2.2
A typical frequency synthesizer topology
The design trade–off
6.3 Phase noise evaluation
6.3.1
6.3.2
6.3.3
6.3.4
Identification and quantification of noise sources
Propagation from the noise source to the output node
Combination of all contributions
Numerical aspects
6.4 Behavioral models for top–down design
6.4.1
6.4.2
6.4.3
Synthesizer models for transceiver functional–level design
Top–down behavioral–level models for synthesizer design
Illustration : settling time evaluation during top–down design
6.5 Behavioral models for bottom–up verification
6.5.1
6.5.2
Accurate nonlinear model of the local oscillator
Illustration : phase noise evaluation of a complete frequency
synthesizer at the verification stage
6.6 Summary
References
7
Nonlinear Symbolic Network Analysis: Algorithms and Applications to
RF Circuits
7.1 Algorithm
7.1.1
7.1.2
7.1.3
Terminology
Description of the algorithm fundamentals
Nonlinearity stamps for 2nd– and 3rd–order analysis
7.2 Implementation of the algorithm
7.2.1
7.2.2
Error control algorithm
Error tolerances
7.3 Applications of nonlinear symbolic analysis
7.3.1
7.3.2
Two–stage miller–compensated opamp
Downconverting mixer
7.4 Conclusions
References
8
Approaches to Formal Verification of Analog Circuits
Lars Hedrich, Walter Hartong
8.1 Formal Verification: The Alternative Approach
8.1.1
8.1.2
Design Flow
Circuit Description
8.1.2.1
8.1.2.2
Circuit Classes
Other Approaches
8.2 Linear Dynamic Systems
8.2.1
8.2.2
8.2.3
8.2.4
Linear Circuit Description
Basic Algorithm
Outer Enclosure
Inner Enclosure
8.2.4.1
8.2.4.2
Safe Path Between Two Points
Inner Enclosure of a Value Set Using Curvature Examination
8.2.5
8.2.6
Extended Algorithm Including Frequency Interval
Example: gmC-Filter
8.2.6.1
8.2.6.2
Circuit Description
Experimental Results
8.3 Nonlinear Static Systems under Parameter Tolerances
8.3.1
8.3.2
Algorithm
Outer Enclosure
8.3.2.1
8.3.2.2
Start Intervals
Solution Space Deviation
8.3.3
8.3.4
Inner Enclosure
Example: Differential Pair
8.4 Nonlinear Dynamic Systems with Nominal Parameters
8.4.1
8.4.2
State Space Description
Algorithm
8.4.2.1
8.4.2.2
8.4.2.3
8.4.2.4
8.4.2.5
Nonlinear Mapping of State Space Descriptions
Sampling the State Space
Obtaining the Linear Mapping Matrices
Adjustment of the Operating Point
Step Size Control




后面的就省略了..................

xinhunlei

[springer]低功耗设计Low-Power Design Techniques and CAD Tools for Analog

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iseesky

没有全吧？？？？

xinhunlei

第5,6部分,继续

xinhunlei

现在全了,刚才没有上传上

maletuna

thanks

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没有下载完的继续下载哦，已经上传完整

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