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芯片精品文章合集(500篇!)    创芯人才网--重磅上线啦!
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猎头:数字电路工程师(上海美资)

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发表于 2008-4-3 10:13:50 | 显示全部楼层 |阅读模式

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数字电路工程师
(需求人数:1名)
项目:PC Clock

职位描述及要求
1
、相关专业本科以上学历,硕士为佳
2、三年以上数字电路设计工作经验
3、熟悉从系统原理,架构设计,电路实现,测试评估的全过程
4、熟悉EDA工具,CAD系统
5、识别系统设计与电路实现之间的关键问题并提出合理解决方案
6、可以独立地,周全细致地完成模块的设计和验证工作
7、基本的英语会话能力,很好的英语阅读、写作能力

有意者发送简历至hzliya@163.com 来信必回
发表于 2008-4-3 14:38:10 | 显示全部楼层
公司是做什么的
 楼主| 发表于 2008-4-25 16:25:15 | 显示全部楼层

other position

Staff product engineer

POSITION SUMMARY:
The Staff Product (IC) Engineer will be responsible to provide new and existing product support, improve product yields, costs and performances in a timely manner.
**Please note that you must have chip/circuit product engineering background, this is not a hardware product engineering position**

RESPONSIBILITIES:
  • Product characterization
  • Product qualification (from board design to test completion)
  • Interface with design engineering, test engineering, foundry engineering, planning QA/FA, manufacturing and Sales & marketing.
  • DFT review

QUALIFICATIONS:
  • Bachelor of Science degree in Electrical Engineering is required. MS degree in Electrical Engineering preferred.
  • At least 5 years of related work experiences required. Must have experiences working in Semiconductor Company (fabless preferred).
  • Required: Hands-on experience with new product releases, product characterization, tester (HP93k preferred) operation, burn-in board design, production qualification, RMA, yield improvement, SOC mixed signal products, foundry interface and FA experience.
  • Preferred: 90 nm product experiences, image processor type products, video products for flat panels and projectors. Working experiences as product engineer of similar type of products.
  • Experiences with SMIC foundry preferred.
  • Strong analytical skills required.
  • Excellent communications skills, written and oral, technical and business skills
  • Willingness to work in teams as well as individually
  • Ability to speak and understand English language desired


ASIC Design Engineer

Responsibility
-
Be responsible for physical design of large, complex CMOS chips. Tasks including floorplan, partition, power routing, place & route, static timing analysis, DRC/LVS and other physical verification.
-
Work with customer design team early in design phase to define good design strategies.
-
Provide feedback and work closely with product development teams to improve design flow.
   -      Coordinate and work with world wide design teams to ensure on time delivery of design results.

Technical requirement
-
Experienced in place & route, static timing analysis, synthesis

-
Extensive knowledge and experience with Magma, or Synopsys place & route tools

-
Extensive knowledge and experience with Synopsys DC,
PT and PTSI tool

   -       Experience with Perl, tcl scripting
-
Solid understanding of deep sub-micron signal integrity issues such a cross-talk, IR drop, etc
-
Capable of handling multiple tasks at one time
   -       Good customer communication skill is a must
  -     Bachelor degree or above in EE major
   -       Minimum 3 year related experience with a solid IC design and EDA tool background
   -       Fluent in speaking and writing


  
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