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Application Engineer应用工程师(此职位属于销售部门职位) Responsibilities职位描述: 1.
Provide front-line support for the professionalSoC design service in terms of frontend, backend, manufacture, as well aspackaging and testing.
为SoC设计服务中包括前段,后端,以及生产和测试在内的所有流程提供专业化的一线技术支持; 2.
Evaluate the feasibility of IPs (digital andmixed-signal included) on target project and develop the specific applicationbased on the customized requirements. 评估具体项目中IPs(数字和混合信号IP)的可实施性,并基于客户化的需求,开发设计具体的应用系统; 3.
Assist with sales partner to estimate thetrend of market and orientate & explore the high-quality potential customers.
协助销售伙伴预估市场未来走向,并定位和发掘高质量的潜在客户; 4.
Collaborate with relevant internal teams(Engineering, Operation, Finance, etc.) to streamline the proceeding processand resolve emerging issues in the timely manners.
配合内部的相关团队(工程,运营,财务等部门)顺畅项目流程进展,并及时解决流程中随时出现的问题。 Requirements应聘要求:: 1. Masters Degree in Electronics Engineeringor Communications Engineering (Bachelors Degree considered if supported by 5+years experience);
电子技术及通信相关专业硕士学历(本科学历需有5年及以上相关工作经验); 2. 5+ years experience of RTL and asic / SoCdesign and be equip with good knowledge of frontend or backend design. 5年以上RTL和ASIC / Soc相关设计经验,并具备良好的前端或后端的设计知识; 3. Post-graduate experience of communicationsor consumer chip system development based on MCU / dsp is preferred. 具有基于MCU / DSP的通信或消费类芯片开发的工作经验者优先考虑; 4. Experience of embedded softwaredevelopment not essential but a definite advantage; 有嵌入式软件开发经验者非必要条件,但优先考虑; 5. Experience in a customer-facing rolepreferred.
具有支持客户相关经验者优先考虑; 6. Good verbal and written communication inEnglish and Mandarin essential;
中英文读写顺畅。 工作地点:中关村软件园1期 简历请发送至:evita.han@foxmail.com
1、工具软件开发工程师Tool Development Engineer 工作描述: - 视觉图像处理与神经网络相关软件的开发与维护
- DSP处理器开发工具的开发与维护
- 自动化测试工具的开发与维护 职位要求: - 计算机科学与工程学士或硕士学历 - 熟练掌握C/C++ & Java编程 - 具有Windows和Linux环境下的工作经验 - 具有Eclipse 富客户平台开发经验者优先
- 具有OpenCL/OpenVX代码开
发经验者优先
- 熟
悉CNN模型者优先 - 拥有良好的团队合作精神 - 拥有良好的英语读写技能 工作地点:成都天府软件园(可解决成都户口)简历请发送至:evita.han@foxmail.com 2、视频算法工程师 Video Algorithm Engineer 工作描述: - 开发优化多格式视频编解码器,包括算法研究,C-Model设计和实现,以及视频编解码器控制软件的开发,包括上层多种流行通用多媒体软件架构的相应组件和整合。 - 与硬件工程师合作,完成硬件模块的设计,及性能和面积的优化。 - 为客户维护现有的视频控制软件,并帮助客户实现产品化和大规模量产。 职位要求: - 计算机、电子工程专业或相关技术领域硕士及以上学历 - 对于图像格式和视频标准,比如MPEG2,MPEG4,H.264,HEVC,有一定的了解 - 在C/C++编程和嵌入式软件领域有经验者优先 - 在Android/Linux等其中多媒体软件开发有经验者优先,或者熟悉Linux Kernel Driver 开发 - 在硬件设计流程方面有一定经验者优先 - 优秀的中英文沟通能力 - 良好的团队合作精神,能承受较大的工作压力 工作地点:成都天府软件园(可解决成都户口)简历请发送至:evita.han@foxmail.com 3、Video Codec Algorithm Engineer /视频编码算法工程师 Responsibility /工作职责 : - Video codec algorithm research and optimization / 视频编解码的算法研究和优化; - C-Model design and realization / C-Model设计和实现; - Develop and test the video codec control software / 视频编解码器控制软件的开发,调测; - Assistant the hardware engineers to optimize the performance ofhardware modules and area / 帮助硬件工程师优化硬件模块的性能和面积; - Help hardware and system engineers for system verification to solvethe related technical issues /帮助硬件和系统工程师进行系统验证,并解决相关问题; - Resolve customer multimedia system software problems on Android orLinux OS, that use company’s video codec IP /处理用户在使用公司视频编解码IP相关系统软件问题。 Requirements / 要求: l
Over 5-years of related workingexperience in video codec algorithm research fields, or video multimediasoftware / 5年以上相关工作经验; l
MS, PHD , in EE , CS or related ITtechnology fields / 计算机、电子工程专业或相关技术领域硕士及以上学历; l
Skilled in the field of digital videocodec, special on H.264 or H.265, expert in C/C++ design, better on embeddedsoftware field , familiar with Linux or Android multimedia frame work, OMX orY4L2 / 熟练掌握数字视频编解码原理,规范结构,特别在h.264或h.265;在C/C++设计方面和嵌入式软件领域有丰富经验者优先; 了解或者熟悉Android /Linux多媒体框架和插件; l
Some knowledge on hardware design andoptimization is better / 在硬件设计开发及优化方面有工作经验者优先; l
Good Mandarin and English communicationskills / 优秀的中英文沟通能力 l
Good team work and passion in highpressure /良好的团队合作精神,能承受较大工作压力。 l
工作地点:北京中关村软件园
或
成都天府软件园(可解决成都户口) 简历请发送至:evita.han@foxmail.com
(请注明应聘职位及工作地点) 3 、Multimedia video codec SW team leader Responsibility: l Video codec control SW arch design for different multimedia framework. l Develop key modules in video codec control SW. l Manage projects development resource/schedule. l Monitor engineers’ daily jobs, help them resolve some issues. l Debug/fix the critical issues in projects or reported by customers. Requirements: l Over 7-years of related working experience in video codec multimedia software. l Good to have team leader/manager experience. l MS, PHD in SE, CS, EE or related IT technology fields. l Familiar with Android/Linux multimedia frame work, Stagefright, Gstreamer,FFMPEG, OMXIL/Codec2.0 or V4L2; expert in C/C++ design, better on embeddedsoftware field. l Some knowledge on Linux kernel development. l Some knowledge on video formats stream syntax, or video stream file container. l Good Mandarin and English communication skills; l Good team work and passion in high pressure. 工作地点:北京中关村软件园
或
成都天府软件园(可解决成都户口) 简历请发送至:evita.han@foxmail.com
(请注明应聘职位及工作地点) 4、 Sr. Engineer/Staff Engineer of VPU Verification Responsibilities: l
Understandingthe expected functionality of designs. l
Developenvironments for complex system functional verification. l
Writeverification plans for system level IPs and systems. l
Contributeimprovements to verification methodologies, and toolsets. Requirements: l
Minimumof 3 years design/verification experience (test plan, test bench, assertions,debugging designs, code coverage etc.) l
Knowledgein ASIC/FPGA design flow and verification tools/environment (UVM/OVM…). l
Familiarwith design and verification languages (verilog/System Verilog/SVA etc.). l
Familiarwith at least 1 scripting language in Perl/Python/Cshell/Bash/Makefile etc. l
Familiarwith C/C++ is a plus. l
Knowledgeof H.264/HEVC/VP9/JPEG/MPEG or other video/image compression format is a plus. l
Knowledgeof AXI/ AHB/ APB/OCP and other bus protocol is a plus. l
Experiencein video subsystem verification is a plus. l
工作地点:成都天府软件园(可解决成都户口)
简历请发送至:evita.han@foxmail.com
5、 Project Leader/Manager of VPU Verification Responsibilities: l
Understandingthe expected functionality of designs. l
Developenvironments for complex system functional verification. l
Writeverification plans for system level IPs and systems. l
Contributeimprovements to verification methodologies, and toolsets. l
Mangeand guide team members Requirements: l
Minimumof 5 years design/verification experience (test plan, test bench, assertions,debugging designs, code coverage etc.) l
Goodcommunication skills l
Knowledgein ASIC/FPGA design flow and verification tools/environment (UVM/OVM…). l
Richknowledge in design and verification languages (Verilog/System Verilog/SVAetc.). l
Familiarwith at least 2 scripting language in Perl/Python/Cshell/Bash/Makefile etc. l
Familiarwith AXI/ AHB/ APB/OCP and other bus protocol. l
Familiarwith C/C++. l
Knowledgeof H.264/HEVC/VP9/JPEG/MPEG or other video/image compression format is a plus. l
Experiencein video subsystem verification is a plus. l
Experienceof leading a team/sub team is a plus l
工作地点:
成都天府软件园(可解决成都户口)
简历请发送至:evita.han@foxmail.com 公司简介: 芯原股份有限公司成立于2001年,总部位于中国上海和世界各地设有办事处。目前在全球已有超过600名员工。是一家芯片设计平台即服务提供商,为包含移动互联设备、数据中心、物联网(IOT)、可穿戴设备、智能家居和汽车电子等多种终端市场在内的各种广泛应用提供以IP为中心的、基于平台的芯片定制服务和一站式端到端的半导体设计服务。 公司福利包括但不限于:
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给力的薪酬 & 舒适的办公环境 & 简单和谐的工作伙伴 & 各种高品质福利待遇 公司网址:www.verisilicon.com
简历请发送至:evita.han@foxmail.com
(请注明应聘职位及工作地点) |