SOC设计宝书:Design of Systems on a Chip:Design and Test 工业界的大牛写的

corespirit36 · 发表于 2008-8-26 23:22:52

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作者有IEEE Computer Society的Golden Core会员,有IEEE Design and Test of Computers Magazine的Editor,有IEEE Design & Test of Computers的Chief,还有VSI联盟的首席科学家,内容不多,但比较深入,有一定基础的人看了后很有收获.

Chips are nowadays part of every equipment, system or application that embeds electronics. Contrarily to the first decades that followed the transistor invention, the semiconductors market is presently one of the most important segments of the world economy and has become strategic for any country that plans to get some technology independence. In fact, this technology context tends to prevail in next years, since the electronic world will continue expanding fastly through the internet and the wireless communication. Currently, in a single chip of tenths of square milimeters it is possible to integrate hundreds of thousands of transistors and hundreds of passive components. These chips are real integrated systems and, because of that, they are called systems on a chip. The performance of these systems reaches few gigahertz, while the powerconsumption is of the order of milliwatts. In fact, the growth of the integration
density in microelectronics technologies has followed very closely the Moore’s Law announced in the sixties: every year the integration density will double, resulting in an exponential growth along the years. Additionally to the increasing electronics density, technology advances have allowed to integrate heterogeneous parts on the same substrate. Digital, Analog, thermal, mechanical, optical, fluidic and other esoteric functions can now be put together into the same chip (ITRS, 1999; ITRS,2003). This obviously adds to chip complexity.In terms of design, the price to pay for increasing integration scales, densities,performances, functionality, and decreasing sizes and power consumption, is an important growth in the complexity of the design flow. This cost roughly translates into spending more time to produce a new design, or hiring more skilled designers. In respect to time-to-market, considering the real-life competitiveness, the later a product arrives to market, the lower are the revenues got from.
Starting from the arrival to market, the revenues grow to a peak and then start decreasing to the end of the product cycle. The polygon surface is the total revenues that a product can give along time. A T delay in time-to-market will transfer part of the revenues to competitors, and the maximum instant revenue achievable will thus be decreased by the amount transferred at the delayed arrival time. As shown in the figure, this will drastically reduce the polygon surface and will cause an important loss of revenues.

Design of Systems on a Chip-Design and Test.pdf (2.8 MB, 下载次数: 2067 )