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Retargetable Processor System Integration into Multi-Processor SoC Platforms

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发表于 2008-7-12 12:11:31 | 显示全部楼层 |阅读模式

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Retargetable Processor System Integration into Multi-Processor System-on-Chip Platforms

Wieferink, Andreas, Meyr, Heinrich, Leupers, Rainer

2008, Approx. 175 p., Hardcover
ISBN: 978-1-4020-8574-1


Not yet published. Available: September 3, 2008

$199.00

About this book
|
Table of contents

About this book
The ever increasing complexity of modern electronic devices together with the continually shrinking time-to-market and product lifetimes pose enormous chip design challenges to meet flexibility, performance and energy efficiency constraints. As a consequence, the current trend is towards programmable platforms (Multi-Processor System-on-Chip Platforms, MP-SoC), which are tailored to the respective target application. In the usual case, a new platform is designed by selecting and assembling standard platform elements.
However, best results can only be achieved if the processor cores and the communication modules themselves are also optimized for the target application. Effective exploration is only possible if accurate module simulators are generated automatically based on abstract specifications. As a matter of fact, CoWare’s BusCompiler allows generating accurate simulators for communication modules, and modeling languages such as LISA enable the same for processor cores.
In Retargetable Processor System Integration into Multi-Processor System-on-Chip Platforms, such originally independent approaches are combined in order to enable the development of highly optimized programmable platforms.
The first chapters of this book summarize the state of the art in all three involved fields separately: general system level design, communication modeling, and processor modeling. The main chapters then present a methodology and the associated tooling for enabling design space exploration as well as a successive refinement flow for the design of optimized MP-SoCs with a high degree of automation.

Written for:
Researchers and professionals in the fields MP-SoC design, SoC architecture, custom processor design, current and future ASIP developers and system integrators, graduate level students focusing on ESL

Keywords:
  • Application-Specific Instruction-Set Processor (ASIP)
  • Electronic System Level (ESL) Design
  • Multi-Processor System-on-Chip (MP-SoC)
  • Transaction Level Modeling (TLM)


[ 本帖最后由 benemale 于 2008-7-12 12:16 编辑 ]

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发表于 2008-7-12 12:46:06 | 显示全部楼层
many thanks
发表于 2008-7-12 14:01:56 | 显示全部楼层
many many thanks!
发表于 2008-7-12 15:09:30 | 显示全部楼层
good oggd  great!!!!!!!!!!
发表于 2008-7-12 15:16:03 | 显示全部楼层
Wow, retargetable multi-processor SoC - got to look at it. Very hot topic recently.

Thank you!
发表于 2008-7-12 15:41:48 | 显示全部楼层
楼主实在太厉害了!
发表于 2008-7-12 18:35:03 | 显示全部楼层
Good!!!
发表于 2008-7-12 21:38:00 | 显示全部楼层
谢谢楼主
发表于 2008-7-12 23:30:53 | 显示全部楼层
又是一本非常好的书,收下了。
发表于 2008-7-12 23:47:35 | 显示全部楼层
thanks for part1
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