FPGA/ASIC资料共享

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FPGA/ASIC资料共享

 类型 作者/时间 回复 查看 最后发表
common   [资料]一天征服FFT(Mastering The Fourier Transform in One Day) 附件  ...23456..21 liuyanluo 2009-12-26 204/16781 gfangclara 7 天前 15:24
common   [资料]syn_2015.06-SP4 附件 zzhan123 2016-1-12 8/714 zenghongyan 7 天前 15:05
common   静态时序分析(Static Timing Analysis)基础与应用(上)  ...2345 wapoca 2009-6-20 40/9543 ericp 7 天前 14:58
common   [资料][高性能RTL设计]RTL Coding and Optimization Guide for use with Design Compiler 附件  ...23456 free2bird 2010-8-15 56/3470 tabata 7 天前 11:15
common   [资料]UVM cookbook 2013 自制详细书签版+练习代码,UVM查询手册,论坛首发 附件  ...23456..13 lxing_1988 2014-12-30 129/7892 wzc92 7 天前 10:31
common   [原创]LDPC Coded Modulations 附件  ...23 ylt9811115 2012-8-29 24/1299 smrecnik 7 天前 10:29
common   [资料]SPI GPIO IP Core 附件  ...234 kazekili 2011-1-26 34/3460 smrecnik 7 天前 10:26
common [原创]刚从Xilinx代理那里要到的Vivado 12.2 的license 附件  ...23456..12 tercel8888 2012-9-14 114/9815 EEERS 7 天前 10:05
common   [资料]AES高效实现 附件  ...2 renninger1 2010-4-23 19/1648 linger2003 7 天前 09:19
common   [资料]AES SBOX 的设计与实现 附件  ...23 sfjrichard 2011-4-20 28/2662 linger2003 7 天前 09:18
common   [资料]gxivivado 2012.3 2012.4 license 附件  ...23 er6y 2012-11-29 25/3671 zisa 7 天前 05:54
common   [资料]Xilinx Vivado license:Vivado Patch v2(2012年) 附件  ...23456..12 caoshangfei 2012-9-8 111/14078 zisa 7 天前 05:45
common   [资料]Xilinx_ISE14.6_vivado2013.2_linux_win_license 附件  ...234 caoshangfei 2014-7-7 38/4725 zisa 7 天前 05:17
common   [资料]win64.2015.4.1 Vivado License 附件  ...23456..7 朱亮 2016-4-21 68/5062 zisa 7 天前 04:50
common   [资料]synplify 2015.03 / synopsys FPGA2015.03 windows 百度云盘 图片附件  ...23456..33 woai2020 2015-6-3 323/26152 zisa 7 天前 04:46
common   [资料]Understanding Digital Signal Processing 3rd Edition 附件  ...234 zlpengcn 2012-2-3 39/4814 gurulu 7 天前 02:20
common   [原创]PrimeTime® PX Recommended Methodology for Power Analysis 附件  ...234 leadwellfine 2010-4-4 34/3186 cdting 7 天前 02:14
common   [资料]关于Flash memory中的Charge Pump 附件  ...2345 shysu 2013-7-7 44/4200 cdting 7 天前 02:12
common   [资料]SPI经典IP核 verilog 附件  ...23456..25 jiangyq 2010-7-22 249/20248 cdting 7 天前 02:04
common   [资料]分享一个i2c总线IP核及2014年官方最新的i2c协议规范 附件  ...23456 tianyan_chn 2015-8-21 51/2857 cdting 7 天前 02:03
common   [资料]Digital Design OF DSP by SHOAB AHMED KHAN 附件  ...2 zisa 2013-7-22 17/1542 cdting 7 天前 02:02
common   [资料]ModelSim+Synplify+Quartus的Altera FPGA的仿真与验证 附件  ...23456..32 bruce8949 2010-6-9 314/18668 zisa 2017-9-18 21:09
common [原创]Cadence包括IC617在内的全套新版工具套件(2015年底版) min4max 2016-1-17 3/946 zisa 2017-9-18 20:49
common [资料]【首发】FPGA设计基础 附件  ...2 yeyazi 2017-6-18 15/342 jimcmwang 2017-9-18 20:31
common [资料]【首发】数字滤波器的MATLAB与FPGA实现 ALTERAVERILOG版 VHDL版 附件  ...234 yeyazi 2017-8-14 32/509 jimcmwang 2017-9-18 20:30
common   [资料]Synopsys SCL11.9 DC2015.06 PT2015.06 VCS2014.12 Verdi2014 Synplify2015下载破解 - [阅读权限 20]图片附件  ...23456..44 caoshangfei 2015-9-16 437/15686 qiqiffff 2017-9-18 17:50
common   visio下画电路原理图的模板 附件  ...23456..19 smartzz 2009-4-27 181/18095 dafei4057 2017-9-18 17:35
common   novas verdi 2009.04 教程 附件  ...23456..28 lmz05 2009-7-18 270/22904 花涛 2017-9-18 16:53
common   [讨论]【求助】原来的debussy可以在win7的64位系统下运行吗? 牛虻 2014-5-22 6/4086 子亦 2017-9-18 16:02
common   【经典图书系列下载】Introduction to Vlsi Systems 附件  ...23456..8 vertyang 2008-2-28 78/7811 iamsicheng 2017-9-18 15:44
common [原创]SD 卡host controller IP core Verilog 代码(包含仿真平台) 附件  ...23456..13 xjm527 2013-2-19 126/11268 david69 2017-9-18 14:53
common   [资料][E-book share] Synthesizable Verilog-HDL Code 附件 stanlleychen 2014-3-9 8/832 david69 2017-9-18 14:52
common   [资料]基于Verilog HDL的通信系统设计(比较全) 附件  ...23456..9 lijuanwei 2014-1-20 83/5282 freebigfish 2017-9-18 14:50
common   spi协议verilog hdl程序包 附件  ...23456..39 北斗 2006-8-10 384/657279 david69 2017-9-18 14:48
common   [资料]基于FPGA的SATA IP CORE设计 附件  ...23 oatzht 2014-6-11 23/1522 david69 2017-9-18 14:47
common   [资料]SD新书Design Recipes for FPGAs (Second Edition) Using Verilog and VHDL 附件  ...23456 jacobshen 2015-11-19 56/2545 david69 2017-9-18 14:46
common   [资料]分享 FPGA嵌入式图像处理系统设计(英文版) 附件  ...234 a200556220407 2015-8-4 38/1485 david69 2017-9-18 14:23
common [资料]Principles of VLSI RTL Design: A Practical Guide 附件  ...23456..16 drjiachen 2011-5-7 155/8813 willtuna 2017-9-18 14:17
common [原创]【Navabi 2010 新书】Digital System Test and Testable Design: Using HDL Models 附件  ...23456..13 benemale 2010-12-15 120/9604 willtuna 2017-9-18 14:14
common   【经典原版图书】VLSI数字信号处理系统:设计与实现—中、英文版齐全! 附件  ...23456..131 benemale 2009-3-8 1306/59789 willtuna 2017-9-18 14:12
common   [原创]Xilinx_Zynq-7000 、Artix-7、Kintex-7、Virtex-7 原理图及PCB封装库 - [阅读权限 2]附件  ...23456 chenpenghjh3 2013-4-30 50/783 jimcmwang 2017-9-18 12:58
common   【2008新书】Modern Coding Theory 附件  ...23 cotterie 2008-8-4 29/3079 jimcmwang 2017-9-18 12:57
common [原创]【M.K 2005】Comprehensive Functional Verification (Systems on Silicon) 附件  ...23456 benemale 2008-8-3 55/4429 jimcmwang 2017-9-18 12:55
common   [资料]BFM (bus functional modle) 附件 yurenjie 2010-5-26 6/1986 kimluanpklu 2017-9-18 12:00
common   [资料]syn_vL-2016.03 附件  ...2 zzhan123 2016-3-31 17/1911 ilwork24 2017-9-18 11:55
common   [资料]32位除法器设计Verilog代码 附件  ...23456..12 liulangshusheng 2010-12-22 111/14646 kimluanpklu 2017-9-18 11:40
common   [资料]SOC Test Architectures 附件  ...2 igloopen 2013-10-1 10/946 jimcmwang 2017-9-18 11:30
common [资料]Xilinx系列FPGA芯片IP核详解 [刘东华编著] 附件  ...2345 yhsy1002 2017-6-6 41/473 安丶和桥 2017-9-18 11:15
common   [资料]VLSI Circuit Design Methodology Demystified 附件  ...2 igloopen 2013-10-1 12/1589 jimcmwang 2017-9-18 10:57
common   [资料]Engineering and Scientific Computations Using MATLAB 附件 igloopen 2013-10-2 8/770 jimcmwang 2017-9-18 10:56